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Item Details
Title:
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VERILOG DIGITAL COMPUTER DESIGN
ALGORITHMS INTO HARDWARE |
By: |
Mark Arnold |
Format: |
Mixed media product |
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List price:
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£70.49 |
We currently do not stock this item, please contact the publisher directly for
further information.
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ISBN 10: |
0136392539 |
ISBN 13: |
9780136392538 |
Publisher: |
PEARSON EDUCATION LIMITED |
Pub. date: |
29 June, 1998 |
Pages: |
592 |
Description: |
Useful for introductory-level courses in Verilog Hardware Description Language, this book introduces the Verilog Hardware Description Language as a different way to explore concepts in digital and computer design. It shows how synthesis is a tool for automatically converting source code into hardware, using ASM charts and examples. |
Synopsis: |
For introductory-level courses in Verilog Hardware Description Language. Written by the co-developer of the Verilog Implicit To One hot (VITO) preprocessor, this text introduces the industry standard Verilog Hardware Description Language as a new way to explore enduring concepts in digital and computer design, such as pipelining. It shows how Verilog simulation is a tool for uncovering bugs prior to hardware fabrication, and how Verilog synthesis is a tool for automatically converting source code into hardware. Ideal for designers new to Verilog, it features a consistent design framework using ASM charts, and contains many realistic, practical examples. |
Publication: |
UK |
Imprint: |
Prentice-Hall |
Returns: |
Returnable |
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