|
|
|
Item Details
Title:
|
DESIGN RECIPES FOR FPGAS
USING VERILOG AND VHDL |
By: |
Peter Wilson |
Format: |
Electronic book text |
List price:
|
£36.99 |
We currently do not stock this item, please contact the publisher directly for
further information.
|
|
|
|
|
ISBN 10: |
0080971369 |
ISBN 13: |
9780080971360 |
Publisher: |
ELSEVIER SCIENCE & TECHNOLOGY |
Pub. date: |
21 September, 2015 |
Edition: |
2nd edition |
Pages: |
388 |
Synopsis: |
This book provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, it provides design techniques and templates at all levels, together with functional code, which you can easily match and apply to your application. Written in an informal and easy to grasp style, this invaluable resource goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA. In addition, the book provides advanced techniques to create 'real world' designs that fit the device required and which are fast and reliable to implement. Examples are rewritten and tested in Verilog and VHDLDescribes high-level applications as examples and provides the building blocks to implement them, enabling the student to start practical work straight awaySingles out the most important parts of the language that are needed for design, giving the student the information needed to get up and running quickly |
Illustrations: |
Approx. 100 illustrations |
Publication: |
UK |
Imprint: |
Newnes (an imprint of Butterworth-Heinemann Ltd ) |
Returns: |
Non-returnable |
|
|
|
|
Ramadan and Eid al-Fitr
A celebratory, inclusive and educational exploration of Ramadan and Eid al-Fitr for both children that celebrate and children who want to understand and appreciate their peers who do.
|
|
|
|
|
|
|
|
|
|
|