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Item Details
| Title:
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ARM SYSTEM DEVELOPER'S GUIDE
DESIGNING AND OPTIMIZING SYSTEM SOFTWARE |
| By: |
Andrew Sloss, Dominic Symes, Chris Wright |
| Format: |
Hardback |
| List price:
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£65.99 |
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We currently do not stock this item, please contact the publisher directly for
further information.
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| ISBN 10: |
1558608745 |
| ISBN 13: |
9781558608740 |
| Publisher: |
ELSEVIER SCIENCE & TECHNOLOGY |
| Pub. date: |
25 March, 2004 |
| Series: |
The Morgan Kaufmann Series in Computer Architecture and Design |
| Pages: |
689 |
| Description: |
Demonstrates not only how to write efficient ARM software in C and assembly but also how to optimize code. This book outlines distinctions among the versions of the ARM architecture. It demonstrates how to implement DSP algorithms. It describes the cache technologies that surround the ARM cores as well as memory management techniques. |
| Synopsis: |
Over the last ten years, the ARM architecture has become one of the most pervasive architectures in the world, with more than 2 billion ARM-based processors embedded in products ranging from cell phones to automotive braking systems. A world-wide community of ARM developers in semiconductor and product design companies includes software developers, system designers and hardware engineers. To date no book has directly addressed their need to develop the system and software for an ARM-based system. This text fills that gap. This book provides a comprehensive description of the operation of the ARM core from a developer's perspective with a clear emphasis on software. It demonstrates not only how to write efficient ARM software in C and assembly but also how to optimize code. Example code throughout the book can be integrated into commercial products or used as templates to enable quick creation of productive software. The book covers both the ARM and Thumb instruction sets, covers Intel's XScale Processors, outlines distinctions among the versions of the ARM architecture, demonstrates how to implement DSP algorithms, explains exception and interrupt handling, describes the cache technologies that surround the ARM cores as well as the most efficient memory management techniques. A final chapter looks forward to the future of the ARM architecture considering ARMv6, the latest change to the instruction set, which has been designed to improve the DSP and media processing capabilities of the architecture. |
| Publication: |
US |
| Imprint: |
Morgan Kaufmann Publishers In |
| Returns: |
Returnable |
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